(1) Field of the Invention
The present invention relates to the fabrication of integrated circuit devices on semiconductor chips, and more particularly relates to making improved elevated bond-pad structures for bonding chips on and to a substrate using flip-chip technology. These elevated bond-pad structures are particularly useful for increasing the density of the input/output (I/O) bond pads on a chip while reducing electrical shorts between closely spaced (adjacent) solder balls (bumps) on the array of pads. The elevated bond pads increase the spacing between chip and substrate during bonding for improved under-fill flow rates, and also reduce Alpha (α) particle emission from Pb/Sn solder balls or bumps into the semiconductor chip.
(2) Description of the Prior Art
In recent years there has been a renewed interest in replacing the conventional wire bond techniques with flip-chip bonding techniques to increase circuit performance and reduce package size. In the flip-chip method lead/tin (Pb/Sn) solder balls (or bumps) are formed on an array of bonding pads on a chip, and the chip is mounted (soldered) upside-down to a substrate, such as a circuit board, including ceramic substrates, and the like. In recent years advances in the semiconductor process technologies have dramatically decreased the semiconductor device feature sizes and increased the circuit density of the integrated circuits on the chip. As a consequence this increase in circuit density has resulted in increased density of the array of I/O pads on the chip, with reduced spacing between adjacent pads and reduced pad areas. Because of surface tension, the volume-to-surface area of the solder is maximized and the solder forms a bead or ball (bump). When the area of the bond pad is reduced and hence the wetting surface is reduced in size, the lead balls are also smaller (e.g., <100 um). When the chip is bonded to the substrate, the reduced spacing between the chip and the substrate makes it more difficult to under-fill between the chip and the substrate (circuit board) with Epoxy+filler to strengthen the solder joints and seal the chip on the “circuit board.”
Numerous methods for making bonding pads for both wire bond and flip-chip bonding have been reported in the literature. For example, one method for wire bonding is described in U.S. Pat. No. 6,376,353 B1 to Zhou et al. in which an Al—Cu alloy bond pad is used to improve the adhesion of the wire-bond solder to the underlying Cu metallurgy. U.S. Pat. No. 6,544,880 B1 to Akram shows a method in which one or more metal barrier layers are deposited on the underlying copper to improve adhesion. In U.S. Pat. No. 5,523,920 to Machuga et al. a method is described for elevating the bonding pads above a polymeric coating on a circuit board to facilitate soldering operations. Methods relating to flip-chip bonding include U.S. Pat. No. 5,891,756 to Erickson in which a wire bond pad is converted to a flip-chip solder bump by electroless plating nickel (Ni) on the underlying Al pad to prevent oxidation. A solder bump pad is then formed on the nickel.
In U.S. Pat. No. 6,578,754 B1 to Tung an elongated pillar structure is described for flip-chip bonding. The lower portion of the pillar is copper to reduce alpha particles, and the upper portion is PbSn for bonding. U.S. Pat. No. 6,692,629 B1 to Chen et al. uses a plating bus over and along the cutting lines (kerf areas) to each bond pad for plating the bump pads prior to separating the chips by cutting (dicing). In U.S. Pat. No. 6,770,547 B1 to Inoue et al., a method is described for making underfill-less flip-chip bonding that allows defective chips to be replaced on the circuit board, and also avoids alpha particle thereby preventing soft errors in the semiconductor circuit. Several Patent Application Publications have been identified that address the flip-chip technology. In Pub. No. U.S. 2002/0121692 A1 to Lee et al., a method is described to form closely spaced (fine pitch) pillar solder bump pads on a chip for flip-chip bonding. Pub. No. U.S. 2004/0157450 A1 to Bojkov et al. describes a method for directly bonding solder bumps to copper studs.
However, there is still a strong need in the semiconductor industry to improve the bonding pad structure for flip-chip (lead bump) technology for high-density integrated circuits without significantly increasing manufacturing process complexity.